Several semiconductor devices are based on compensation structures. Such compensation devices are n- or p-channel metal oxide semiconductor field-effect transistors, diodes, insulated gate bipolar transistors (IGBT), thyristors or other components. Compensation devices may be based on mutual compensation of a charge of n- and p-doped areas in the drift region of the transistor. The areas are spatially arranged such that the line integral over the doping along a line running vertical to the p-n-junction remains below the material-specific breakdown charge (approximately 2×1012 cm−2 for lightly doped silicon). For example, in a vertical transistor, p- and n-pillars or plates may be arranged in pairs.
For example, superjunction transistors or CoolMOS™ transistors may comprise an extremely low output capacitance Coss=Cds+Cgd and reverse transfer capacitance Cgd (gate-drain capacitance) at drain voltages above the depletion voltage (e.g. 10-50V). In this way, very low switching losses may be enabled, since the energy in the output capacitance Eoss may be low, however, on the other hand leading to extreme switching edges and—in systems with not sufficiently small parasitics as Ls (parasitic inductance) or external Cgd-portions—to ringing and EMI (electromagnetic interference). It is desired to reduce the ringing and/or EMI, for example.